Book2

COMPUTER SCIENCE INTERVIEW PREPARATION SERIES MONOGRAPH 02 / 06 BOOK 2 · ACADEMIC & TECHNICAL RECRUITMENT CSE Lecturer Interview Core Systems Computer Architecture, Operating Systems, Computer Networks, Database Systems, Software Engineering, and Security CORE SUBJECT ARCHITECTURE 01 Computer Architecture Pipelining, hazard resolution, cache hierarchies, vir- tual memory translation, and ISA trade-offs. 02 Operating Systems Process scheduling, concurrency, deadlocks, page replacement, and file-system internals. 03 Computer Networks Layered protocols, VLSM subnetting, TCP congestion control, routing algorithms, and DNS/TLS. 04 Database Management Systems Relational algebra, B+ trees, ACID transactions, MVCC, lock protocols, and query optimization. 05 Software Engineering Requirements engineering, architectural styles, testing coverage, CI/CD, and reliability metrics. 06 Information Systems & Security CIA triad, cryptographic primitives, authentication protocols, SQLi/XSS mitigation, and governance. VOLUME SCOPE AND METHODOLOGY This monograph addresses the core systems curriculum probed by university faculty selection panels. Every chapter combines a rigorous concept spine and formul

Contents How to Use This Book ii I The Interview as a System 1 1 Answer Architecture for Systems Questions 2 1.1 Why Systems Answers Fail . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1.2 The Systems Design Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1.3 Numbers Every Systems Lecturer Should Recall . . . . . . . . . . . . . . . . . . . . 3 1.4 Handling What You Do Not Know . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 II Computer Architecture 4 2 Performance, Instruction Sets and Pipelining 5 2.1 The CPU Performance Equation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.2 Amdahl’s Law and the Limits of Optimisation . . . . . . . . . . . . . . . . . . . . . 6 2.3 RISC versus CISC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.4 Instruction Pipelining . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 The Memory Hierarchy and Caches 10 3.1 Why a Hierarchy Exists . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.2 Cache Organisation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.3 Average Memory Access Time . . . . .

Contents Book 2: Core Systems 6 Synchronisation and Deadlock 23 6.1 The Critical-Section Problem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6.2 Deadlock: the Four Coffman Conditions . . . . . . . . . . . . . . . . . . . . . . . . 23 6.3 Handling Strategies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 6.4 Banker’s Algorithm, Worked End to End . . . . . . . . . . . . . . . . . . . . . . . 24 7 Memory Management, Fragmentation and Paging 27 7.1 Contiguous Allocation and the Two Fragmentations . . . . . . . . . . . . . . . . . 27 7.2 Paging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 7.3 Segmentation and the Hybrid . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 8 Virtual Memory, Page Replacement and Thrashing 30 8.1 Demand Paging and the Cost of a Fault . . . . . . . . . . . . . . . . . . . . . . . . 30 8.2 Page-Replacement Algorithms on One Reference String . . . . . . . . . . . . . . . 30 8.3 Thrashing, Working Sets and Frame Allocation . . . . . . . . . . . . . . . . . . . . 31 IV Computer Networks 33 9 Layering, Delay and the Transport Choice 34 9.1 The Two Reference Model